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Ģ����Ƶ, the customizable analog IP company, has announced a significant agreement with a major US tier 1 repeat customer, to deliver its agileSecure suite of anti-tamper IP on the TSMC N4P process node, including its new electromagnetic sensor.

The agileSecure portfolio of anti-tamper IP is designed to protect Systems-on-Chips (SoCs) and addresses a critical industry need for robust hardware-level security, particularly for devices operating in sensitive applications on advanced process nodes.

According to Chris Morrison, VP Product Marketing at Ģ����Ƶ: "Hardware-based attacks are becoming increasingly sophisticated, making robust anti-tamper measures essential for any device handling sensitive data. With agileSecure, we are bringing together our customizable, multi-process anti-tamper IP with our new EMFI Sensor. This full suite of tamper detection and tamper prevention tools creates a powerful defense against physical security attacks and strengthens Ģ����Ƶ's position as a leader in on-chip security.”

Ģ����Ƶ’s tamper detection IP is a comprehensive collection of monitors designed to detect a wide variety of physical and side-channel attacks. The launch of the agileEMSensor, which detects Electro-Magnetic Fault Injection (EMFI) attacks, provides protection against one of the most complex physical attack routes, complementing the company's existing tamper detection offerings that guard against voltage, clock and temperature attacks.

Ģ����Ƶ’s range of tamper detection IP includes:

. agileVGLITCH: Voltage Glitch Detector

. agileCAM: Clock Attack Monitor

. agileTSENSE_D: Digital Output Temperature Sensor

. agileEMSensor: Electro-Magnetic Fault Injection (EMFI) Detector

In addition to the tamper detection IP, providing enhanced protection over existing digital solutions for secure enclaves and Root of Trust (RoT) systems, the agileSecure portfolio includes a range of tamper prevention IP. This set of IP includes an internally biased LDO, bandgap reference and oscillator, as well as Power-on-reset and Power-ok circuits to further secure critical circuitry from external attack.

Chris Morrison continues: “Our deal with a major US-based tier 1 customer to provide all of our tamper detection IP and a selection of our tamper prevention IP on the TSMC N4P process node for their next generation communications SoC, highlights the importance of these agileSecure solutions, especially on the most advanced process nodes. This delivery also includes our agilePMON process aging monitor IP and agileADC IP, a 12-bit analog-to-digital converter, confirming the crucial role of resilient analog IP in securing next-generation designs."

The Ģ����Ƶ team will be at the TSMC NA OIP Ecosystem Forum in Santa Clara on 24^th September and the GlobalFoundries Technology Summit in Munich on 15^th October. If you are attending these events you can set up a meeting in advance here.